GPU (RTL) Design - Sr Lead

Company Qualcomm India Private Limited Job Area Engineering Group, Engineering Group > Hardware Engineering General Summary Minimum 4 to 8 years of work experience in ASIC RTL Design Experience in Logic design/micro-architecture/RTL coding is a must. Must have hands on experience with design and integration of complex multi clock domainblocks Experience in Verilog/System-Verilog is a must. Should have knowledge of AMBA protocols - AXI, AHB, APB, clocking/reset/debug architecture Hands on experi…